Embedded Systems Academy

The new CANgineBerry is an active CAN interface with a Cortex-M0 microcontroller and various firmware options. At launch, two options are available: One for a CANopen Controller / Manager and one for a configurable CANopen slave device.

The CANopen Controller scans the network for connected slave devices within less than 50 ms after power-up, sets up process data handling, starts the network and continues monitoring it. Once the host that CANgineBerry is connected to is up and running as well, it can immediately start using the CANopen network and access any device.

The second firmware option is implementing a CANopen slave device which is fully configurable with node ID and with an Object Dictionary that the user creates with the provided CANopen Architect software (evaluation version is sufficient for this use).

The CANgineBerry’s host can be a Raspberry Pi®, another embedded computing systems or even a PC. The communication to the host system uses a regular serial channel (TTL-UART), so no special driver is required as UART support is typically part of all operating systems. The communication between host and CANgineBerry and the API is designed to serve the application. For example, heartbeats are automatically monitored but the host is only informed about changes in the heartbeat status (like “activated” or “lost”) but not about every individual heartbeat message.

This architecture of CANgineBerry addresses the shortcomings of many “CAN shields” that are passive, have no own intelligence and require the host computer to handle all CAN communication message by message. In worst case, a CAN system can have more than ten thousand individual messages per second. Sometimes the real-time requirements are below 10 ms for some responses which is not realistically achievable with a Linux or Windows® based host and a passive approach.

Summary of firmware options currently available or under development:

• CANopen self-configuring Controller / Manager
• CANopen slave device (configurable via EDS, Electronic Data Sheet)
• Lawicel CAN-RS232 protocol
• CANcrypt (secure CAN communication) for the above versions
• CiA 447 – automotive add-on electronics
• J1939 gateway

For more information about the CANgineBerry, current firmware options and availability, visit www.CANgineBerry.com

The new LPC4000 family of microcontrollers from NXP Semiconductors combines two powerful ARM Cortex cores in one microcontroller. The integrated Cortex-M4 and Cortex-M0 can run asymmetrically at up to 150MHz and have access to internal memory of up to 1MB Flash and 264k of RAM.
A multilayer bus matrix with 4 separate RAM blocks ensures that both microcontrollers have independent, fast access to “their” memory, minimizing wait-states.
Next to the “usual” LPCxxx peripherals the new devices also feature high-speed USB and an AES decryption engine for security.
There are several applications that benefit from a dual core solution. If a lot of communication is required, like handling complex communication protocols with specific timing requirements, a dual-core solutions allows using one core as a communication co-processor, clearly separating communication and process handling.
For more information, see NXP’s web pages.

I was visiting Embedded World this week and in regards to microcontrollers the trend towards 32bit continues. When it comes to marketing presence at a trade show, obviously less than 32bit where not “it” this year. Not only chip manufacturers, but also most of the development tools primarily focused on 32bit solutions. And the next impression one gets walking the aisles: ARM processors are the first choice in this arena, with a focus on the Cortex-M generation. At this year’s Embedded World, no other microcontroller architecture had a marketing presence anywhere near that of ARM. Read more…